IntroductionThis course will present a broad yet thorough overview of the subject of digital VLSI design, spanning both the circuit and the system abstractions. This complete picture is the only way to make the right tradeoffs, find the most suitable optimizations and the best implementation strategies for very large scale integrated circuits in deep-submicron technologies. After an introduction to technology, devices and interconnect, combinational logic gates and sequential elements are studied. This is followed by system level perspectives of implementation fabrics, interconnect issues, timing issues and the design of macro blocks. At each level, the opportunities and limitations of the physical implementation are considered for finding better solutions and tradeoffs. This includes the consequences of the analog behavior of digital systems with respect to e.g. cross-talk noise and signal waveforms, that generally tend to become more influential with each new technology generation.
More informationCourse information and documents appear on this webpage. See also BlackBoard .
" Digital Integrated Circuits: A Design Perspective", 2nd edition, J.M. Rabaey et al., Prentice Hall, 2003 ISBN 0-13-120764-4
Instructorsdr.ir. Nick van der Meijs.
Assignments: Qin Tang, Ashish and Amir Zjajo.
ExamThe written exam will be an open-book exam. You are allowed to have the Rabaey book with you. In addition, you may use a printed copy of the lecture slides, possibly with your own annotations. You are not allowed to consult any other material during the exam.
The course will include a design project, using Cadence. The grade will be determined for 50% by the exam, and for 50% by the lab course (project) results. In addition, there will be bonus points to be awarded for the best designs.
Exam material and past exams: see here.